Journal of Beijing University of Posts and Telecommunications

  • EI核心期刊

JOURNAL OF BEIJING UNIVERSITY OF POSTS AND TELECOM ›› 2009, Vol. 32 ›› Issue (3): 91-95.doi: 10.13190/jbupt.200903.91.wugj

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A Novel Acquisition Algorithm Based on Parallel Search in Time and Frequency Domain and FPGA Implementation

  

  • Received:2008-09-18 Revised:2009-03-04 Online:2009-06-28 Published:2009-06-28

Abstract:

Based on the framework of “Multi-bank matched filter + FFT”, a new acquisition algorithm is proposed and implemented, which is based on time and frequency domain parallel search and applicable to P code direct acquisition in GPS (Global Positioning System) high dynamic situation. Its novelty is multi-bank matched filter’s implementation in the structure of “folded filters + re-order RAM” and its FPGA implementation in parallel. The pipelined implementation shows that the new algorithm occupies about 1/16 of the old one. Simulation results and field tests show the algorithm improves P code direct acquisition performance in GPS high dynamic situation.

Key words: acquisition, matched filters, folded filters, FPGA